Nikos Hardavellas

Associate Professor of Computer Science and Computer Engineering
Department of Computer Science (CS) and Department of Electrical and Computer Engineering (ECE)
McCormick School of Engineering and Applied Science, Northwestern University.

Research Interests

Parallel systems, computer architecture, microarchitecture, nanophotonics, memory systems, design for dark silicon, memory-oriented system design, quantum computer systems.

Our current research is performed at PARAG@N, the Parallel Architecture Group @ Northwestern. The mission of the group is to achieve energy-efficient high-performance parallel computing at all scales through cross-layer design: from emerging devices and circuits, to computer architecture, compilers, runtimes, operating systems, and applications.

If you are interested in joining PARAG@N, please read this.

Research Before PARAG@N

Research at Carnegie Mellon University

My research proceeded along three synergistic fronts that encompassed hardware, software, and scalable performance evaluation techniques. In particular:

  1. Scalable Hardware.
    • Cache designs (R-NUCA) that dynamically optimize data placement on chip, allowing for controlled replication and near-neighbor sharing through Rotational Interleaving.
    • Transistor-efficient multicore designs through ADviSE (Analytic Design-Space Exploration), a collection of first-order performance, area, bandwidth, power and thermal analytical models.
    • Memory systems with spatio-temporal memory streaming, a memory system in which data move in correlated streams, rather than only individual cache blocks.
  2. Scalable Parallel Software.
    Execution migration of complex database queries across cores (QPIPE) and multicore-specific optimizations for storage managers (Shore-MT).

  3. Scalable Performance Evaluation Techniques.
    FLEXUS, a cycle-accurate full-system simulation infrastructure, and precursor to QFlex.

Research at University of Rochester

  • Cashmere: a two-level software distributed-shared-memory system over low-latency remote-memory-access networks.
  • Carnival: a tool for the characterization and analysis of waiting time and communication patterns of parallel shared-memory applications.

Research in Industry (Digital, Compaq, Hewlett-Packard)

While affiliated with Digital Equipment Corp., Compaq Computer Corp., and Hewlett-Packard, I was a member of the design team of high-end multiprocessor servers. I contributed to the Alpha EV6 (21264), EV7 (21364), and EV8 (21464) generations of microprocessors, and had a fleeting relationship with the Piranha multicore. The rest of my time was spent working on a number of AlphaServers in the Titan, Wildfire, and Marvel families: the Marvel (GS-1280), WildFire (GS-320), and Privateer (ES-45) multiprocessor systems. The AlphaServer GS systems were used to sequence the human genome, and the AlphaServer ES-45 system was the building block of the ASCI Q Supercomputer installed at Los Alamos, and was the second fastest supercomputer in the world in 2003. My work focused on memory hierarchy and multiprocessor system design, including adaptive and multi-level cache coherence protocols, migratory data optimizations, novel caching schemes, RAMbus modeling and optimizations, link retraining, flow control, directory caches, routing, and system topology. Also, I worked on the design and development of full-system execution-driven, trace-driven, and statistical simulators, and tools and techniques for performance analysis.


Nikos Hardavellas is an associate professor of Computer Science and Computer Engineering at Northwestern University, where he directs the Parallel Architecture Group at Northwestern (PARAG@N, His research interests are at the intersection of computer architecture and nanophotonics, parallel systems, microarchitecture, design for dark silicon, and quantum computer systems. Nikos is the recipient of the June and Donald Brewer Chair at Northwestern University (2009), an NSF CAREER award (2015), a Faculty Service award (2022), was included in the Associated Student Government Faculty Honor Roll (2022), was a keynote speaker at IEEE ISPDC (2010), and became a Fellow of the Searle Center for Teaching Excellence in 2012. He received best paper awards, nominations and test-of-time awards at HPCA (2022), ISLPED (2021), EDBT (2019) and ICDE (2006), an IEEE Micro Top Picks Award (2010), an IEEE Micro Top Picks Honorable Mention (2023), and a Technical Award for Contributions to the Alpha Microprocessor (2000). Prior to joining Northwestern University, he contributed to the design of several generations of Alpha microprocessors and high-end multiprocessor servers at Digital Equipment Corp. (DEC), Compaq, and Hewlett-Packard. Nikos received a Ph.D. in Computer Science from Carnegie Mellon University.

Resume: Resume
Curriculum Vitae: CV

Fun Trivia

My Erdős number is 3:
  1. Paul Erdős - Noga Alon : MR0996763 (90c:05112)
  2. Noga Alon - Phillip B. Gibbons : MR1915030 (2003g:68032)
  3. Phillip B. Gibbons - Nikos Hardavellas : SPAA-07
Academic Genealogy, designed by Nicole D. Hill (over 1000 years, ending in Constantinople in 990 AD).
Here is a link to my entry in the Mathematics Genealogy Project.


Office address: 2233 Tech Dr, Mudd Hall 3517, Evanston, IL 60208, USA   Map
E-mail:   Email

If you are interested in joining PARAG@N, please do not email me. Instead, read this.