Research

Publications

MARC: Mining Advantages in non-deteRministic Code

The application landscape is rapidly evolving including more often non-deterministic (e.g., randomized) algorithms. Current compilers ignore whether or not a program being compiled is randomized, leaving important opportunities unexplored. The MARC research project aims to identify and exploit such opportunities.

Selected publications

	Enrico Armenio Deiana , Brian Suchy , Michael Wilkins , Brian Homerding , Tommy McMichen , Katarzyna Dunajewski , Peter Dinda , Nikos Hardavellas , and Simone Campanoni Program State Element Characterization International Symposium on Code Generation and Optimization (CGO), 2023 Acceptance rate: 39.2% (20/51)
	Ettore M. G. Trainiti, Thanapon Noraset , David Demeter, Doug Downey , and Simone Campanoni CODE: Compiler-Based Neuron-Aware Ensemble Training Machine Learning and Systems (MLSys), 2021 Acceptance rate: 24.1% (52/216)
	Michael Leonard , and Simone Campanoni Introducing the Pseudorandom Value Generator Selection in the Compilation Toolchain International Symposium on Code Generation and Optimization (CGO), 2020 Acceptance rate: 27.4% (26/95)
	Enrico Armenio Deiana , and Simone Campanoni Workload Characterization of Nondeterministic Programs Parallelized by STATS International Symposium on Performance Analysis of Systems and Software (ISPASS), 2019 Acceptance rate: 29.5% (26/88)
	Enrico Armenio Deiana , Vincent St-Amour , Peter Dinda , Nikos Hardavellas , and Simone Campanoni Unconventional Parallelization of Nondeterministic Applications International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2018 Acceptance rate: 17.6% (56/319)

Other publications

	Ettore M. G. Trainiti, Simone Campanoni , and Doug Downey Compiler-based neuron-aware deep neural network ensemble training US Patents, 2022
	Enrico Armenio Deiana , Vincent St-Amour , Peter Dinda , Nikos Hardavellas , and Simone Campanoni The Liberation Day of Nondeterministic Programs International Conference on Parallel Architectures and Compilation Techniques (PACT), 2017

Parallelizing compilers for shared-memory multicores

The multicore revolution in microprocessor architecture has left most programs behind. A program that maps easily to multicore architectures is the exception, not the rule. Our goal is to map virtually all programs to a multicore platform gaining unprecedented performance.

Selected publications

	Zujun Tan , Yebin Chon , Michael Kruse , Johannes Doerfert , Ziyang Xu , Brian Homerding , Simone Campanoni , and David I. August SPLENDID: Supporting Parallel LLVM-IR Enhanced Natural Decompilation for Interactive Development International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2023 Acceptance rate: 26.7% (72/270)
	Angelo Matni , Enrico Armenio Deiana , Yian Su , Lukas Gross , Souradip Ghosh , Sotiris Apostolakis , Ziyang Xu , Zujun Tan , Ishita Chaturvedi , Brian Homerding , Tommy McMichen , David I. August , and Simone Campanoni NOELLE Offers Empowering LLVM Extensions International Symposium on Code Generation and Optimization (CGO), 2022 Acceptance rate: 28.7% (27/94)
	Xiaochun Zhang, Timothy M. Jones , and Simone Campanoni Quantifying the Semantic Gap Between Serial and Parallel Programming International Symposium on Workload Characterization (IISWC), 2021 Acceptance rate: 39.6% (19/48)
	Mike Rainey , Kyle C. Hale , Ryan Newton , Nikos Hardavellas , Simone Campanoni , Peter Dinda , and Umut A. Acar Task Parallel Assembly Language for Uncompromising Parallelism International Conference on Programming Language Design and Implementation (PLDI), 2021 Acceptance rate: 27.2% (87/320)
	Sotiris Apostolakis , Ziyang Xu , Zujun Tan , Greg Chan, Simone Campanoni , and David I. August SCAF: A Speculation-Aware Collaborative Dependence Analysis Framework International Conference on Programming Language Design and Implementation (PLDI), 2020 Acceptance rate: 22.6% (77/341)
	Sotiris Apostolakis , Ziyang Xu , Greg Chan, Simone Campanoni , and David I. August Perspective: A Sensible Approach to Speculative Automatic Parallelization International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2020 Acceptance rate: 18.1% (86/476)
	Simone Campanoni , Kevin Brownell , Svilen Kanev , Timothy M. Jones , Gu-Yeon Wei , and David M. Brooks Automatically Accelerating Non-Numerical Programs By Extracting Threads with an Architecture-Compiler Co-Design Communication ACM Research Highlights (CACM), 2017
	Niall Murphy, Timothy M. Jones , Robert Mullins , and Simone Campanoni Performance Implications of Transient Loop-Carried Data Dependences in Automatically Parallelized Loops International Conference on Compiler Construction (CC), 2016 Acceptance rate: 31.2% (24/77)
	Simone Campanoni , Glenn Holloway , Gu-Yeon Wei , and David M. Brooks HELIX-UP: Relaxing Program Semantics to Unleash Parallelization International Symposium on Code Generation and Optimization (CGO), 2015 Acceptance rate: 27.3% (24/88) One of four papers nominated for the Best Paper Award by the Program Committee
	Simone Campanoni , Kevin Brownell , Svilen Kanev , Timothy M. Jones , Gu-Yeon Wei , and David M. Brooks HELIX-RC: An Architecture-Compiler Co-Design for Automatic Parallelization of Irregular Programs International Symposium on Computer Architecture (ISCA), 2014 Acceptance rate: 17.8% (46/258) IEEE Micro’s Top Picks in Computer Architecture Conferences honorable mention, 2014 Communication ACM Research Highlights (CACM), 2017
	Simone Campanoni , Timothy M. Jones , Glenn Holloway , Gu-Yeon Wei , and David M. Brooks HELIX: Making the Extraction of Thread-Level Parallelism Mainstream IEEE computer Society Digital Library (IEEE Micro), 2012
	Simone Campanoni , Timothy M. Jones , Glenn Holloway , Vijay Janapa Reddi , Gu-Yeon Wei , and David M. Brooks HELIX: Automatic Parallelization of Irregular Programs for Chip Multiprocessing International Symposium on Code Generation and Optimization (CGO), 2012 Acceptance rate: 28.9% (26/90)
	Simone Campanoni , Timothy M. Jones , Glenn Holloway , Gu-Yeon Wei , and David M. Brooks The HELIX Project: Overview and Directions Design Automation Conference (DAC), 2012 Acceptance rate: 22.7% (168/741)
	Simone Campanoni , and Stefano Crespi Reghizzi Traces of Control-Flow Graphs International Conference on Developments in Language Theory (DLT), 2009 Acceptance rate: 45.7% (32/70)

Other publications

	Angelo Matni , Enrico Armenio Deiana , Yian Su , Lukas Gross , Souradip Ghosh , Sotiris Apostolakis , Ziyang Xu , Zujun Tan , Ishita Chaturvedi , David I. August , and Simone Campanoni NOELLE Offers Empowering LLVM Extensions ArXiv, 2021
	Alessandro A. Nacci, Gianluca C. Durelli, Josue Pagan, Marina Zapater, Matteo Ferroni, Riccardo Cattaneo, Monica Vallejo, Simone Campanoni , Jose Ayala, and Marco D. Santambrogio Power-Awareness and Smart-Resource Management in Embedded Computing Systems International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2015
	Khalid Al-Hawaj, Simone Campanoni , Gu-Yeon Wei , and David M. Brooks Unified Cache: A Case for Low Latency Communication International Workshop on Parallelism in Mobile Platforms (PRISM), 2015
	Niall Murphy, Timothy M. Jones , Simone Campanoni , and Robert Mullins Limits of Static Dependence Analysis for Automatic Parallelization International Workshop on Compilers for Parallel Computing (CPC), 2015
	Simone Campanoni , Svilen Kanev , Kevin Brownell , Gu-Yeon Wei , and David M. Brooks Breaking Cyclic-Multithreading Parallelization with XML Parsing International Workshop on Parallelism in Mobile Platforms (PRISM), 2014
	Gu-Yeon Wei , David M. Brooks , Simone Campanoni , Kevin Brownell , and Svilen Kanev Methods and apparatus for parallel processing US Patents, 2014
	Michele Tartara , Stefano Crespi Reghizzi , and Simone Campanoni Extending Hammocks for Parallelism Detection Italian Conference on Theoretical Computer Science (ICTCS), 2010

Compilers for Sub-Cycle Microarchitecture Activities

Safety margins in conventional architectures are conservative to always avoid computational errors leading to energy inefficiencies. Resilient architectures squeeze these margins to save energy, correcting errors through costly rollback. Co-designed compilers can help resilient architectures to reduce their overhead by adapting the running code to their run-time characteristics

Selected publications

	Yuanbo Fan , Simone Campanoni , and Russ Joseph Time Squeezing for Tiny Devices International Symposium on Computer Architecture (ISCA), 2019 Acceptance rate: 17.0% (62/365)
	Yuanbo Fan , Tianyu Jia , Jie Gu , Simone Campanoni , and Russ Joseph Compiler-guided instruction-level clock scheduling for timing speculative processors Design Automation Conference (DAC), 2018 Acceptance rate: 24.3% (168/691)
	Vijay Janapa Reddi , Svilen Kanev , Wonyoung Kim , Simone Campanoni , Michael D. Smith , Gu-Yeon Wei , and David M. Brooks Voltage Noise in Production Processors IEEE Micro’s Top Picks in Computer Architecture Conferences, 2011
	Vijay Janapa Reddi , Svilen Kanev , Wonyoung Kim , Simone Campanoni , Michael D. Smith , Gu-Yeon Wei , and David M. Brooks Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-guided Thread Scheduling International Symposium on Microarchitecture (MICRO), 2010 Acceptance rate: 18.1% (45/248) IEEE Micro’s Top Picks in Computer Architecture Conferences, 2011
	Vijay Janapa Reddi , Simone Campanoni , Meeta S. Gupta , Kim Hazelwood , Michael D. Smith , Gu-Yeon Wei , and David M. Brooks Eliminating Voltage Emergencies via Software-Guided Code Transformation ACM Transactions on Architecture and Code Optimization (TACO), 2010
	Vijay Janapa Reddi , Simone Campanoni , Meeta S. Gupta , Michael D. Smith , Gu-Yeon Wei , and David M. Brooks Software-Assisted Hardware Reliability: Abstracting Circuit-level Challenges to the Software Stack Design Automation Conference (DAC), 2009 Acceptance rate: 21.7% (148/682)

Other publications

Vijay Janapa Reddi , Meeta S. Gupta , Krishna K. Rangan , Simone Campanoni , Glenn Holloway , Michael D. Smith , Gu-Yeon Wei , and David M. Brooks
Voltage Noise: Why It’s Bad, and What To Do About It
International Workshop on Silicon Errors in Logic - System Effects (SELSE), 2009

The power of modern compilers for the hardware-software stack

Modern compilers are more powerful than what they are currently used for. This research direction shows how modern compilers create opportunities to reconsider the abstractions used between the layers of the hardware-software stack. Changing such abstractions generates important benefits compared to how we have been designing systems.

Selected publications

	Michael Wilkins , Sam Westrick , Vijay Kandiah , Alex Bernat , Brian Suchy , Enrico Armenio Deiana , Simone Campanoni , Umut A. Acar , Peter Dinda , and Nikos Hardavellas WARDen: Specializing Cache Coherence for High-Level Parallel Languages International Symposium on Code Generation and Optimization (CGO), 2023 Acceptance rate: 39.2% (20/51)
	Ling Jin, Yinzhi Cao , Yan Chen , Di Zhang, and Simone Campanoni EXGEN: Cross-platform, Automated Exploit Generation for Smart Contract Vulnerabilities IEEE Transactions on Dependable and Secure Computing (TDSC), 2023
	Vito Kortbeek , Souradip Ghosh , Josiah Hester , Simone Campanoni , and Przemysław Pawełczak WARio: Efficient Code Generation for Intermittent Computing International Conference on Programming Language Design and Implementation (PLDI), 2022 Acceptance rate: 20.9% (68/326)
	Brian Suchy , Souradip Ghosh , Aaron Nelson , Zhen Huang, Drew Kersnar , Siyuan Chai , Michael Cuevas , Alex Bernat , Gaurav Chaudhary , Nikos Hardavellas , Simone Campanoni , and Peter Dinda CARAT CAKE: Replacing Paging via Compiler/Kernel Cooperation International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2022 Acceptance rate: 20.2% (80/397)
	Jiacheng Ma , Wenyi Wang, Aaron Nelson , Michael Cuevas , Brian Homerding , Conghao Liu, Zhen Huang, Simone Campanoni , Kyle C. Hale , and Peter Dinda Paths to OpenMP in the Kernel High Performance Computing, Networking, Storage and Analysis (SC), 2021 Acceptance rate: 26.8% (98/365)
	Souradip Ghosh , Michael Cuevas , Simone Campanoni , and Peter Dinda Compiler-based Timing For Extremely Fine-grain Preemptive Parallelism High Performance Computing, Networking, Storage and Analysis (SC), 2020 Acceptance rate: 25.1% (95/378)
	Brian Suchy , Simone Campanoni , Nikos Hardavellas , and Peter Dinda CARAT: A Case for Virtual Memory through Compiler- And Runtime-based Address Translation International Conference on Programming Language Design and Implementation (PLDI), 2020 Acceptance rate: 22.6% (77/341)

Other publications

Kyle C. Hale , Simone Campanoni , Nikos Hardavellas , and Peter Dinda
The Case for an Interwoven Parallel Hardware/Software Stack
International Workshop on Runtime and Operating Systems for Supercomputers (ROSS), 2021

Bytecode Virtual Machines

Virtual machines designed to execute bytecode programs are everywhere. The most successful and widely-adopted examples are Java and .NET. Browsers are virtual machines as well thanks to their ability to run programs written in multiple languages (e.g., JavaScript). A bytecode virtual machine usually includes several components. Code generators, code optimizers, garbage collectors, execution engine, and profilers are the most common ones. Understanding interactions of these components allows them to be co-designed, which open interesting optimization opportunities.

Selected publications

	Simone Campanoni Guide to ILDJIT Book from Springer, 2011
	Simone Campanoni , Giovanni Agosta , Stefano Crespi Reghizzi , and Andrea Di Biagio A highly flexible, parallel virtual machine: design and experience of ILDJIT Software: Practice and Experience (SPE), 2010
	Simone Campanoni , Martino Sykora , Giovanni Agosta , and Stefano Crespi Reghizzi Dynamic Look Ahead Compilation: a technique to hide JIT compilation latencies in multicore environment International Conference on Compiler Construction (CC), 2009 Acceptance rate: 25.0% (18/72)

Other publications

	Simone Campanoni , and Luca Rocchini Static Memory Management within Bytecode Languages on Multicore Systems Workshop on Computing in Heterogeneous, Autonomous ’N’ Goal-oriented Environments (CHANGE), 2011
	Michele Tartara , Simone Campanoni , Giovanni Agosta , and Stefano Crespi Reghizzi Parallelism and Retargetability in the ILDJIT Dynamic Compiler Architecture of Computing Systems (ARCS), 2010
	Simone Campanoni , Giovanni Agosta , and Stefano Crespi Reghizzi A parallel dynamic compiler for CIL bytecode ACM SIGPLAN Notices, 2008
	Simone Campanoni , Giovanni Agosta , and Stefano Crespi Reghizzi ILDJIT: a Parallel Dynamic Compiler International Conference on Very Large Scale Integration (VLSI-SoC), 2008

Placing wireless sensors

Placing wireless sensors in the target environment is crucial to gain the right knowledge.

Selected publications

	Simone Campanoni , and William Fornaciari Multi-level Design and Optimization of Wireless Sensor Networks International Conference on Networked Sensing Systems (INSS), 2008
	Simone Campanoni , and William Fornaciari Models and Tradeoffs in WSN System-Level Design Euromicro Symposium on Digital System Design (DSD), 2008

Other publications

	Simone Campanoni , and William Fornaciari Node-Level Optimization of Wireless Sensor Networks International Conference on Wireless Communications, Networking and Mobile Computing (WiCom), 2008
	Simone Campanoni , and William Fornaciari Ensuring Feasibility of Wireless Sensor Networks International Conference on Circuits and Systems for Communications (ICCSC), 2008
	Simone Campanoni , and William Fornaciari SWORDFISH: A framework to formally design WSNs capturing events International Conference on Software, Telecommunications and Computer Networks (SoftCOM), 2007

Others

Here you can find research we did in past projects.

Selected publications

	Nayana Prasad Nagendra , Bhargav Reddy Godala , Ishita Chaturvedi , Atmn Patel , Svilen Kanev , Tipp Moseley , Jared Stark , Gilles A. Pokam , Simone Campanoni , and David I. August EMISSARY: Enhanced Miss Awareness Replacement Policy for L2 Instruction Caching International Symposium on Computer Architecture (ISCA), 2023 Acceptance rate: 21.2% (79/372)
	Georgios Tziantzioulis , Nikos Hardavellas , and Simone Campanoni Temporal Approximate Function Memoization IEEE Micro's special issue on Approximate Computing, 2018
	Filippo Sironi , Davide B. Bartolini , Simone Campanoni , Fabio Cancare , Henry Hoffmann , Donatella Sciuto , and Marco D. Santambrogio Metronome: Operating System Level Performance Management via Self-Adaptive Computing Design Automation Conference (DAC), 2012 Acceptance rate: 22.7% (168/741)

Other publications